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1
Content available remote

Improvement of Anode/HTL Interface Properties Using Self-Assembled Monolayer in Organic Electronic Devices

100%
Yaman M., Yagmurcukardes N., Havare A., Aydin H., Ocakoglu K., Okur S.
Acta Physica Polonica A
|
2013
|
vol. 123
|
issue 2
459-460
EN
Fabrication and characterization of highly efficient organic light-emitting diode with surface modification of indium tin oxide anodes by using self-assembled monolayer technique have been studied. Four different self-assembled molecules, K-28 ruthenium complex, octadecylamine hydrochloride, octadecyltrichlorosilane and mercaptohexdecanoic acid are used to modify ITO surface to improve the interface properties. Space charge limited currents measurements have been used to evaluate carrier mobility under steady state current. The results show that the surface properties such as the stability of ITO anode layer have significant effects on charge injection in organic light-emitting diode devices.
2
Content available remote

Modification of MOS Devices by High-Field Electron Injection and Arc Plasma Jet Treatment

63%
Andreev V., Bondarenko G., Maslovsky V., Stolyarov A.
Acta Physica Polonica A
|
2015
|
vol. 128
|
issue 5
887-890
EN
Methods of modification of gate dielectrics of the MOS structures by high-field electron injection and arc plasma jet treatment were studied. It is possible to use them for correction of parameters, decreasing defects number and increasing reliability of MOS devices. It was found that the negative charge accumulated in the film of the phosphorus-silicate glass of the MOS structures with the two-layer gate dielectric SiO₂-phosphorus-silicate glass under the high-field electron injection can be used for modification of devices with the same structures. It is shown that the injection-thermal treatment allows to find and exclude MOS structures with defects of isolation and charge defects. Arc plasma jet treatment was found to improve characteristics of the MOS devices. These treatments increase injection and radiation resistance of the gate dielectric by creating the needed density of electron traps in the bulk of SiO₂ film.
3
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Photo-Effects in In/p-CuInSe_{2} Schottky-Type Junction

63%
Opanowicz A., Kościelniak-Mucha B.
Acta Physica Polonica A
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1991
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vol. 79
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issue 2-3
411-414
EN
The voltage-dependent photocurrent and the short-circuit photocurrent generated by the modulated light in the In/p-CuInSe_{2} junction were measured. The results suggest that the recombination of carriers occurs in the metal-semiconductor interface as well as in the recombination centres present in the space charge region of the junction. Both the interface recombination and the recombination in the centres can be modified by illumination of the junction.
4
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Modification of Gate Dielectric in MOS Devices by Injection-Thermal and Plasma Treatments

63%
Andreev V., Bondarenko G., Maslovsky V., Stolyarov A.
Acta Physica Polonica A
|
2014
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vol. 125
|
issue 6
1371-1374
EN
The influence of injection-thermal and plasma treatments on the characteristics of the MOS-structure is studied. It is shown that the thermal stable part of the negative charge which accumulates in the phosphorus-silicate glass (PSG) film in the structures with the two-layer gate dielectric SiO_2-PSG under high-field Fowler-Nordheim electron injection can be used for the characteristics modification of MOS-structures with above described structure. The injection-thermal and plasma treatments of MOS-structures are offered to use for improving the reliability and finding the samples which have the charge defects. It is found that using the injection-thermal and plasma treatments allows to increase the injection and radiation stability of the dielectric films of MOS-structures due to structural changes in the SiO_2 film and Si-SiO_2 interface.
5
Content available remote

SiO_{2} Layer Charge State Variation in Fowler-Nordheim Tunneling Regime

63%
Strzałkowski I., Kowalski M.
Acta Physica Polonica A
|
1997
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vol. 92
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issue 3
585-590
EN
The charge build-up and its changes in the amorphous SiO_{2} layer incorporated into a Si MOSFET as a gate oxide due to Fowler-Nordheim tunneling electron injection were investigated. Electron and hole trapping/detrapping by native and generated trap centres were studied by monitoring the charge state of the SiO_{2} traps by means of a drain-source current versus gate-source voltage technique. New interesting effects were observed and their possible mechanisms are presented.
6
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Electric Field Stimulated Emission of Electrons from Deep Traps in SiO_{2}

51%
Strzałkowski I., Marczewski M., Kowalski M., Jastrzębski C.
Acta Physica Polonica A
|
1993
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vol. 84
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issue 4
701-704
EN
An electric field induced electron tunneling emission from deep traps and an energy distribution of trap levels in VLSI grade SiO_{2} layers have been studied using a new isochronal - EFSE - technique. A broad spectrum with a density of trap states peak at about 1.9 eV was observed for the first time. The experiment proved the importance of an electron trap-to-band tunneling emission in SiO_{2}.
7
Content available remote

On Trap Generation in SiO_{2} Films of Si MOSFETS by Hot Electrons

51%
Strzałkowski I., Marczewski M., Kowalski M., Jastrzębski C., Bąkowski A.
Acta Physica Polonica A
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1992
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vol. 82
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issue 4
685-688
EN
Trap generation in amorphous SiO_{2} films with thickness about 500 Å was studied by nonavalanche injection of hot electrons. The trap density, the electron capture cross-section of native and generated traps and the effective trap generation constant for the oxide fields of 1-4 MV/cm, injected charge density up to 3 × 10^{19} e/cm^{-2} and injected current density in the range 2-300 μA/cm^{2} were determined and discussed.
8
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Investigation of the Stress in MOS Structures with Micro-Raman Scattering

51%
Borowicz P., Borowicz L., Brzezińska D.
Acta Physica Polonica A
|
2009
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vol. 116
|
issue S
S-42-S-44
EN
Two kinds of samples were investigated with micro-Raman spectroscopy. MOS structures having poly-silicon gates with metallic contact were made of Al with addition of 1% Cu. The other type of the sample was Si wafer subjected to surface oxidation. The position of the sample was changed along z-axis in order to maximize the Raman signal coming from different layers of the structure. Two MOS structures were studied, both prepared in the same process, and after that only one was thermally-treated at temperature 400°C. The spectra coming from different layers of the structure were analyzed numerically using Lorentzian profile. The authors want to point out that the measurements of the Raman signal performed through the metallic contact of the poly-silicon gate gave anomalously large signal coming from silicon structure. This effect was observed only for thermally threated sample. This suggest that in the case of thermally-treated structure the signal observed through the metallic contact was magnified by surface-enhanced Raman scattering phenomenon.
9
Content available remote

Calcium Fluoride Barrier Layer in Tunnel Emitter Phototransistor

51%
Illarionov Y., Vexler M., Suturin S., Fedorov V., Sokolov N.
Acta Physica Polonica A
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2012
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vol. 121
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issue 1
158-161
EN
Owing to the optimized growth technology of the 1-2 nm calcium fluoride films on n-(111)-silicon, metal/tunnel-insulator/semiconductor phototransistors have been fabricated by the molecular beam epitaxy at the temperature 250°C. The characteristics of these transistors were measured in a wide range of voltages, and the proofs for current gain were found throughout the investigated range. The gain value exceeds 10^3 approaching the theoretically estimated value in this system. The stability and reproducibility of the device characteristics were satisfactory. The results support the candidacy of calcium fluoride for being a vital dielectric in silicon-based functional electronics.
10
Content available remote

Investigation on the Mechanisms of Nitrogen Shallow Implantation Influence on Trap Properties of SiO_2/n-Type 4H-SiC Interface

51%
Król K., Sochacki M., Szmidt J.
Acta Physica Polonica A
|
2014
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vol. 125
|
issue 4
1033-1037
EN
Silicon carbide (SiC) is the only wide-bandgap semiconductor capable of forming native dielectric layer of SiO_2 by thermal oxidation. This unique property of SiC combined with its high thermal conductivity and high critical field makes this semiconductor material suitable for high power electronic devices. Unfortunately, the state-of-the art technology does not use the full benefits of the material, especially in the case of MOSFET transistors. This is caused by insufficient electrical parameters of SiO_2/SiC interface. Two-component structure of the material and its high density result in high level of interface traps reducing the surface mobility and thus increasing series resistance of the device. One of the proposed methods of reducing the trap density in SiC MOS structure is a shallow nitrogen implantation prior to oxidation. This technique is based on the observation that introducing nitrogen into the SiO_2/SiC system results in significant reduction of trap states density and increase of the channel effective mobility. The shallow implantation technique has been reported to be as much effective as nitric oxide annealing which is one of the most effective techniques for oxide quality improvement in case of SiC. Unlike the diffusion based techniques, like postoxidation annealing, implantation of the nitrogen prior oxidation has the possibility of nitrogen concentration control near the oxide interface during oxidation process itself. This property is important since it was shown that the improvement degree is directly proportional to amount of nitrogen built in the vicinity of SiO_2/SiC interface during oxidation. However, previous investigations about this technique were inconclusive about the influence of implantation parameters and process conditions on observed effects. Both improvement and deterioration of interface quality was observed by different researchers. This behavior was never explained clearly. The primary objective of this research is to analyze the impact of implantation conditions on electrical properties of SiO_2/SiC MOS structure. This analysis is used to evaluate a hypothetical description of physical phenomena during oxidation of shallowly implanted substrates.
11
Content available remote

Compact Modeling for Submicron Fully Depleted SOI MOSFET's

51%
Remmouche R., Boutaoui N., Bouridah H.
Acta Physica Polonica A
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2012
|
vol. 121
|
issue 1
190-192
EN
In this paper, we have developed a novel compact charge-conservative model for fully depleted silicon-on-insulator MOSFETs and implemented it in SPICE3. Our model is valid for the DC, small-signal and large-signal simulations over a wide range of temperature. Simulations made using the model, following parameter extraction, are validated by comparison with experimental data.
12
Content available remote

Description of Electrical Characteristics of Semiconducting Compound-Insulator Interface on the Basis of the Model of Interface States Distributed in Energy and in Space

51%
Kochowski S.
Acta Physica Polonica A
|
1992
|
vol. 82
|
issue 5
761-764
EN
The calculation results of the influence of interface state parameters on capacitance-voltage and conductance-voltage characteristics of n-GaAs metal insulator semiconductor structures are presented. The U-shaped distribution in the energy dimension and Gaussian-like distribution in the space dimension for insulator-semiconductor interface states are assumed.
13
Content available remote

Electronic Properties of Thin HfO_2 Films Fabricated by Atomic Layer Deposition on 4H-SiC

51%
Taube A., Gierałtowska S., Gutt T., Małachowski T., Pasternak I., Wojciechowski T., Rzodkiewicz W., Sawicki M., Piotrowska A.
Acta Physica Polonica A
|
2011
|
vol. 119
|
issue 5
696-698
EN
Applicability of thin HfO_2 films as gate dielectric for SiC MOSFET transistor is reported. Layers characterisation was done by means of atomic force microscopy and scanning electron microscopy, spectroscopic ellipsometry and C-V and I-V measurements of MIS structures. High permittivity dielectric layers were deposited using atomic layer deposition. Investigation showed high value of κ = 15 and existence of high density surface states (5 × 10^{12} eV^{-1} cm^{-2}) on HfO_2/SiC interface. High leakage current is caused probably due to low conduction band offset between hafnium oxide and silicon carbide.
14
Content available remote

Electrostatic Gates for GaN/AlGaN Quantum Point Contacts

51%
Czapkiewicz M., Cywiński G., Dybko K., Siekacz M., Wolny P., Gierałtowska S., Guziewicz E., Skierbiszewski C., Wróbel J.
Acta Physica Polonica A
|
2012
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vol. 122
|
issue 6
1026-1028
EN
We report on AlGaN/GaN quantum point contacts fabricated by using e-beam lithography and dry ion etching. The tunable nano-constrictions are defined by the integration of side and top gates in a single device. In this configuration, the planar gates are located on the both sides of a quantum channel and the metallic top gates, which cover the active region, are separated from the substrate by an insulating and passivating layers of HfO_2 or Al_2O_3/HfO_2 composite. The properties of devices have been tested at T = 4.2 K. For side gates we have obtained a very small surface leakage current I_g< 10^{-11} A at gate voltages |V_g| < 2 V, however, it is not enough to close the quantum channel. With top gates we have been able to reach the pinch-off voltage at V_g = - 3.5 V at a cost of I_g ≈ 10^{-6} A, which has been identified as a bulk leakage current.
15
Content available remote

High Quality Gate Insulator/GaN Interface for Enhancement-Mode Field Effect Transistor

45%
Taube A., Kruszka R., Borysiewicz M., Gierałtowska S., Kamińska E., Piotrowska A.
Acta Physica Polonica A
|
2011
|
vol. 120
|
issue 6A
A-22-A-24
EN
The capacitance-voltage measurements were applied for characterization of the semiconductor/dielectric interface of GaN MOS capacitors with SiO_2 and HfO_2/SiO_2 gate stacks. From the Terman method low density of interface traps (D_{it} ≈ 10^{11} eV^{-1} cm^{-2}) at SiO_2/GaN interface was calculated for as-deposited samples. Samples with HfO_2/SiO_2 gate stacks have higher density of interface traps as well as higher density of mobile charge and effective charge in the dielectric layers. High quality of SiO_2/GaN interface shows applicability of SiO_2 as a gate dielectric in GaN MOSFET transistors.
16
Content available remote

Barriers in Miniaturization of Electronic Devices and the Ways to Overcome Them - from a Planar to 3D Device Architecture

45%
Godlewski M., Guziewicz E., Gierałtowska S., Łuka G., Krajewski T., Wachnicki Ł., Kopalko K.
Acta Physica Polonica A
|
2009
|
vol. 116
|
issue S
S-19-S-21
EN
We witness a new revolution in electronic industry - a new generation of integrated circuits uses as a gate isolator HfO_{2}. This high-k oxide was deposited by the atomic layer deposition technique. The atomic layer deposition, due to a high conformality of deposited films and low growth temperature, has a large potential to be widely used not only for the deposition of high-k oxides, but also of materials used in solar cells and semiconductor/organic material hybrid structures. This opens possibilities of construction of novel memory devices with 3D architecture, photovoltaic panels of the third generation and stable in time organic light emitting diodes as discussed in this work.
17
Content available remote

Modification of MIS Devices by Irradiation and High-Field Electron Injection Treatments

38%
Andreev D., Bondarenko G., Andreev V., Maslovsky V., Stolyarov A.
Acta Physica Polonica A
|
2017
|
vol. 132
|
issue 2
245-248
EN
Methods to modify gate dielectrics of MIS structures by irradiation treatments and high-field electron injection into dielectric are considered. In addition, distinctive features of these methods used to correct parameters of MIS devices are studied. It was found out that negative charge, accumulating in the thin film of phosphosilicate glass (PSG) of the MIS structure having a two-layer gate dielectric SiO_2-PSG under the high-field injection or during the irradiation treatment can be used to correct the threshold voltage to improve the charge stability and raise the voltage of breakdown for the MIS devices. It is proved that the density of electron traps rises with the increasing thickness of the PSG film. In this paper a method to modify electrophysical characteristics of MIS structures by the high-field tunnel injection of electrons into the gate dielectric under the mode of controlled current stress is proposed. The method allows to monitor changing of MIS structure parameters directly during the modification process.
18
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Electrical properties and memory effect in the field effect transistor based on organic ferroelectric insulator and pentacene

38%
Matsuo Y., Ijichi T., Yamada H., Hatori J., Ikehata S.
Open Physics
|
2004
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vol. 2
|
issue 2
357-366
EN
We have fabricated a field effect transistor (FET) based on an organic ferroelectric insulator and molecular conductor, and investigated the electrical properties and memory effects on the PEN-FET. We have observed a drastic change in the drain current at around the coercive electric fieldE c of the organic ferroelectric insulator in not only a FET (PEN-FET) based on a pentacene (PEN) film but also a FET (IPEN-FET) based on an iodine doped PEN film. The magnitude of the change of the drain current for the IPEN-FET is 200 times larger than that for the PEN-FET. It is expected from these results that the PEN-FET (especially the IPEN-FET) is an improvement in such devices, since it operates at a low gate electric field accompanied by the appearance of the spontaneous polarization in the organic ferroelectric insulator. In addition, we have found that the drain current for the PEN-FET does not return to the initial drain current ofE G=0 V/cm for more than one week, even if the gate electric field is changed to 0 V/cm from 500 V/cm(>E c). From these results, it is suggested that the PEN-FET becomes a memory device.
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