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PN-ISO 690:2012
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Journal
International Journal of Electronics and Telecommunications
2019
|
65
|
2
|
Article title
A New Approach of an Error Detecting and Correcting Circuit by Arithmetic Logic Blocks
Authors
S. Kavitha
,
Fazida Hanim Hashim
,
Noorfazila Kamal
Content
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Languages of publication
PL
Abstracts
Keywords
PL
EDAC
ALU
speed
block reduction
power
slew rate
Nauki Techniczne
Publisher
Polska Akademia Nauk
Journal
International Journal of Electronics and Telecommunications
Year
2019
Volume
65
Issue
2
Physical description
Contributors
author
S. Kavitha
author
Fazida Hanim Hashim
author
Noorfazila Kamal
References
Document Type
Publication order reference
Identifiers
YADDA identifier
bwmeta1.element.oai-journals-pan-pl-110229
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