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The Design Aspects for Ultra Low-Power, Low-Noise 90 nm CMOS Charge Sensitive Amplifier for the Active Pixel Detector

100%
Barzdenas V., Navickas R.
Acta Physica Polonica A
|
2009
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vol. 115
|
issue 6
1139-1140
EN
A falling particle in the digital registration systems for elementary particles active pixel detector induces electric charge, the value of which describes the parameters of the particle in the detector. Since the electric charge induced by a single particle is relatively weak, the detector signal is first processed (amplified and shaped) right in the zone of irradiation and only then transmitted further. This paper analyses the primary analogical registration electronics for digital registration systems for elementary particles active pixel detectors, which is charge sensitive amplifiers operating in the nanoampere region.
2
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Electron Charge Noise Minimization in 130 nm CMOS Preamplifiers

100%
Barzdenas V., Navickas R.
Acta Physica Polonica A
|
2008
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vol. 113
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issue 3
825-828
EN
In this paper we present the design aspects for low-power, low-noise CMOS charge sensitive preamplifier that uses a leakage current compensation circuit for use with radiation sensors. The preamplifier has unipolar response with the peaking time of about 45 ns and the gain about 115-145 mV/ke. Equivalent noise charge (ENC) is less than 80 e, when the input charge is 1-20 ke and the sensors capacitance is equal to 30 fF. In this work we present the quality function of the charge sensitive preamplifier, which characterizes best the optimal input transistor width W, with respect to equivalent noise charge and to the power consumptions.
3
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The Fast Differential Amplifier-Based Integrated Circuit Yield Analysis Technique

81%
Baskys A., Navickas R., Simkevicius C.
Acta Physica Polonica A
|
2011
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vol. 119
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issue 2
259-261
EN
The fast differential amplifier-based integrated circuit yield analysis technique, which enables determining the interrelation between the integrated circuit yield and dimensions of circuit elements, has been presented. The technique is based on the common use of experimental statistical analysis and statistical modeling as well as on the introduction of the concept of the integrated circuit intermediate parameters. The results of yield analysis of the concrete integrated circuit based on the differential amplifiers are presented.
4
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Phase Noise Minimization in CMOS Voltage Controlled Oscillators

81%
Charlamov J., Navickas R., Baskys A.
Acta Physica Polonica A
|
2011
|
vol. 119
|
issue 2
234-236
EN
Relaxation RC type voltage controlled oscillator is more desirable for many applications because of wide frequency generation range, small size on chip and linear voltage to frequency transfer characteristic. The limiting factor of such voltage controlled oscillator type is that it has higher phase noise in comparison with liquid crystal oscillators. We discuss how different device components, parameters and configuration influence phase noise, including transistor noise sources dependence on its geometrical parameters. The simulation results of the relaxation voltage controlled oscillator which was implemented in different 180 nm and 90 nm CMOS technologies are reported.
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