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Journals
5
International Journal of Electronics and Telecommunications
Years
1
2013
4
2012
Authors
5
Adamski M.
3
Doligalski M.
2
Bukowiec A.
2
Tkacz J.
1
Łabiak G.
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Petri Net Based Specification in the Design of Logic Controllers with Exception Handling Mechanism
100%
Doligalski M.
,
Adamski M.
International Journal of Electronics and Telecommunications
|
2012
|
vol.
58
|
issue
1
2
Full text local access
Structured Mapping of Petri Net States and Events for FPGA Implementations
100%
Tkacz J.
,
Adamski M.
International Journal of Electronics and Telecommunications
|
2013
|
vol.
59
|
issue
4
3
Full text local access
Hierarchical Configurable Petri Net Modeling in VHDL
100%
Doligalski M.
,
Adamski M.
International Journal of Electronics and Telecommunications
|
2012
|
vol.
58
|
issue
4
4
Full text local access
Synthesis of Macro Petri Nets into FPGA with Distributed Memories
100%
Bukowiec A.
,
Adamski M.
International Journal of Electronics and Telecommunications
|
2012
|
vol.
58
|
issue
4
5
Full text local access
UML Modelling in Rigorous Design Methodology for Discrete Controllers
71%
Łabiak G.
,
Adamski M.
,
Doligalski M.
,
Tkacz J.
,
Bukowiec A.
International Journal of Electronics and Telecommunications
|
2012
|
vol.
58
|
issue
1
Page
/ 1
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