Full-text resources of PSJD and other databases are now available in the new Library of Science.
Visit https://bibliotekanauki.pl

PL EN


Preferences help
enabled [disable] Abstract
Number of results
2016 | 130 | 1 | 252-255

Article title

Accelerating Processors with Simple Touches

Authors

Content

Title variants

Languages of publication

EN

Abstracts

EN
Computer architects are familiar with complex processor designs. A tiny performance improvement may need involvement of numerous experts and months of tedious work. But sometimes without adding lots of extra hardware or inventing complex hardware algorithms, it is still possible to accelerate a design substantially by doing minor alterations in the data path. This paper presents how an ARM compatible processor's clock rate became 1.285 times faster by changing IO pads, employing multiplexers, and improving the ALU design. The processor has been implemented in Verilog HDL and the performance improvements have been verified by simulation using the Design Compiler tool of Synopsys.

Keywords

EN

Contributors

author
  • Bursa Orhangazi University, Department of Computer Engineering, Bursa, Turkey

References

  • [1] J.L. Hennessy, D.A. Patterson, Computer Architecture: A Quantitative Approach, 5th ed., Morgan Kauffman, Waltham 2012
  • [2] D.H. Albonesi, in: 25th Intl. Symp. On Computer Architecture, IEEE, Barcelona 1988, p. 282, doi: 10.1109/Isca.1998.694788
  • [3] B.R. Childers, H. Tang, R. Melhem, in: Kool Chips Workshop, 2000, p. 78
  • [4] A. Hartstein, T.R. Puzak, in: 29th Intl. Symp. On Computer Architecture, IEEE, Anchorage 2002, p. 7, doi: 10.1109/Isca.2002.1003557
  • [5] C.-H. Hsu, U. Kremer, M. Hsiao, in: Workshop On Power-Aware Computer Systems, IEEE, Huntington Beach 2000, p. 275, doi: 10.1109/Lpe.2001.945416
  • [6] A. Iyer, D. Marculescu, in: 29th Intl. Symp. On Computer Architecture, IEEE, Anchorage 2002, p. 158, doi: 10.1109/Isca.2002.1003573
  • [7] V. Milutinovic, D. Fura, W. Helbig, IEEE Trans. Comp. 40, 1214 (1991), doi: 10.1109/12.102825
  • [8] Ali-Reza Adl-Tabatabai, C. Kozyrakis, B. Saha, Unlocking Concurrency: Multicore Programming With Transactional Memory, Acm Queue, 2006
  • [9] M. Powell, A. Agrawal, T.N. Vijaykumar, B. Falsafi, K. Roy. in: 34th Intl. Symp. On Microarchitecture, IEEE, 2001, p. 54, doi: 10.1109/Micro.2001.991105
  • [10] H. Esmaeilzadeh, T. Cao, X. Yang, S.M. Blackburn, K.S. Mckinley, in: The ACM International Conference On Architectural Support For Programming Languages And Operating Systems, ACM, New York 2011, p. 319, doi: 10.1145/1950365.1950402
  • [11] G. Ahmet, Chen Charlie Chung-Pin, M.Sc. Thesis, Graduate Institute Of Electronics Engineering, National Taiwan University, 2006

Document Type

Publication order reference

Identifiers

YADDA identifier

bwmeta1.element.bwnjournal-article-appv130n1065kz
JavaScript is turned off in your web browser. Turn it on to take full advantage of this site, then refresh the page.