A comparison of SW/HW implementations of stream cipher encoders

• Authors: Zbigniew Kokosiński , Sławomir Wójcik
• Languages of publication: PL

Abstracts

PL

In this paper, a new method of stream encoding and decoding is presented. It is developed on the basis of a derangement generator. Stream cipher D has been compared with other stream ciphers – E0, W7 and Phelix. Encoding and decoding algorithms have been implemented in C++ and VHDL programming languages. FPGA synthesis data has been reported for Spartan 3E and Virtex 4 devices from Xilinx. The hardware solution has been tested on the Digilent Nexys 2 500K board. Subsequently, comparative studies have been conducted for software and hardware coders, taking into account average coding time and average throughput for 16 input data files of different sizes. Conclusions resulting from the research are derived.

Keywords

PL

stream cipher, coder, decoder, coder throughput, FPGA

• Publisher: [unknown2]
• Journal: Czasopismo Techniczne
• Year: -

Dates

online

2015-04-21

Contributors

author

Zbigniew Kokosiński

author

Sławomir Wójcik