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Journal
International Journal of Electronics and Telecommunications
2018
|
64
|
3
|
Article title
High-performance FPGA Architecture for Data Streams Processing on Example of IPsec Gateway
Authors
Mateusz Korona
,
Krzysztof Skowron
,
Mateusz Trzepiński
,
Mariusz Rawski
Content
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Languages of publication
PL
Abstracts
Keywords
PL
IPsec
FPGA
hardware implementation
data streams processing
Nauki Techniczne
Publisher
Polska Akademia Nauk
Journal
International Journal of Electronics and Telecommunications
Year
2018
Volume
64
Issue
3
Physical description
Contributors
author
Mateusz Korona
author
Krzysztof Skowron
author
Mateusz Trzepiński
author
Mariusz Rawski
References
Document Type
Publication order reference
Identifiers
YADDA identifier
bwmeta1.element.oai-journals-pan-pl-107747
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