Delay Systems Synthesis using Multi-Layer Perceptron Network

• Authors: D. Plonis , A. Katkevičius , V. Urbanavičius , D. Miniotas , A. Serackis , A. Gurskas
• Languages of publication: EN

Abstracts

EN

The aim of this paper is to accelerate development and investigation of the delay systems. The computational time for investigation of particular design of delay system may take from several minutes up to several days. To achieve the required constructional parameters of the system, the iterative calculations usually should be repeated many times. In this paper, an artificial neural network is proposed to be used as the universal approximator for solving mathematical problems of delay system investigation instead of usual analytical and numerical techniques. The application of a multi-layer perceptron is proposed for approximation of solution space with discrete estimates, which were initially received by application of numerical techniques. Different structures of the multi-layer perceptron were tested for approximation. The difference between delay systems synthesis, which was estimated using numerical techniques and trained multi-layer perceptron did not exceed 5% for any of the six design parameter values. The execution time for estimating single delay system was reduced from 240 s to 20 ms. Such fast estimation of design parameters enables performing delay system analysis and design in real time, preserving time for structure visualization in 3D or virtual reality environment.

Keywords

EN

neural networks; delay systems; time consumption; iterative calculations

• Publisher: Institute of Physics, Polish Academy of Sciences
• Journal: Acta Physica Polonica A
• Year: 2018
• Volume: 133
• Issue: 5
• Pages: 1281-1286

Dates

published

2018-05

received

2017-09-25

(unknown)

2018-01-02

Contributors

author

D. Plonis

• Vilnius Gediminas Technical University, Department of Electronic Systems, Naugarduko Str. 41-413, LT-03227, Vilnius, Lithuania

author

A. Katkevičius

• Vilnius Gediminas Technical University, Department of Electronic Systems, Naugarduko Str. 41-413, LT-03227, Vilnius, Lithuania

author

V. Urbanavičius

• Vilnius Gediminas Technical University, Department of Electronic Systems, Naugarduko Str. 41-413, LT-03227, Vilnius, Lithuania

author

D. Miniotas

• Vilnius Gediminas Technical University, Department of Electronic Systems, Naugarduko Str. 41-413, LT-03227, Vilnius, Lithuania

author

A. Serackis

• Vilnius Gediminas Technical University, Department of Electronic Systems, Naugarduko Str. 41-413, LT-03227, Vilnius, Lithuania

author

A. Gurskas

• Vilnius Gediminas Technical University, Department of Electronic Systems, Naugarduko Str. 41-413, LT-03227, Vilnius, Lithuania

Identifiers

DOI

10.12693/APhysPolA.133.1281