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Number of results
2012 | 121 | 1 | 190-192
Article title

Compact Modeling for Submicron Fully Depleted SOI MOSFET's

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EN
Abstracts
EN
In this paper, we have developed a novel compact charge-conservative model for fully depleted silicon-on-insulator MOSFETs and implemented it in SPICE3. Our model is valid for the DC, small-signal and large-signal simulations over a wide range of temperature. Simulations made using the model, following parameter extraction, are validated by comparison with experimental data.
Keywords
EN
Contributors
author
  • Electronics Department, Jijel University, 18000 Jijel, Algeria
  • LEM Laboratory, Jijel University, 18000 Jijel, Algeria
author
  • LEM Laboratory, Jijel University, 18000 Jijel, Algeria
author
  • Electronics Department, Jijel University, 18000 Jijel, Algeria
  • LEM Laboratory, Jijel University, 18000 Jijel, Algeria
References
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  • 4. J.P. Colinge, Silicon on Insulator Technology: Materials to VLSI, Kluwer Academic Publishers, Boston 1997, p. 71
  • 5. J.B. Roldan, F. Gamiz, J.A. Lopez-Villanueva, P. Cartujo-Cassinello, IEEE Electron Dev. Lett. 21, 239 (2000)
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  • 7. B. Iniguez, D. Jiménez, L. Roig, H.A. Hamid, J. Pallarès, IEEE Trans. Electron Dev. 52, 1868 (2005)
  • 8. M.J. Kumar, A. Chaudhry, H. Kumomi, IEEE Trans. Electron Dev. 51, 569 (2004)
  • 9. G.V. Reddy, M.J. Kumar, IEEE Trans. Nanotechnol. 4, 260 (2005)
Document Type
Publication order reference
Identifiers
YADDA identifier
bwmeta1.element.bwnjournal-article-appv121n158kz
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