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2011 | 119 | 2 | 234-236
Article title

Phase Noise Minimization in CMOS Voltage Controlled Oscillators

Content
Title variants
Languages of publication
EN
Abstracts
EN
Relaxation RC type voltage controlled oscillator is more desirable for many applications because of wide frequency generation range, small size on chip and linear voltage to frequency transfer characteristic. The limiting factor of such voltage controlled oscillator type is that it has higher phase noise in comparison with liquid crystal oscillators. We discuss how different device components, parameters and configuration influence phase noise, including transistor noise sources dependence on its geometrical parameters. The simulation results of the relaxation voltage controlled oscillator which was implemented in different 180 nm and 90 nm CMOS technologies are reported.
Keywords
EN
Year
Volume
119
Issue
2
Pages
234-236
Physical description
Dates
published
2011-02
References
  • 1. J. Charlamov, R. Navickas, Solid State Phenom. Mechatronic Syst. and Mater. MSM 2010 164, 221 (2010)
  • 2. T.H. Lee, R.W. Dutton, Solid State Circuits, IEEE J. 40, 630 (2005)
  • 3. L.B. Oliveira, A. Allam, I.M. Filanovsky, , J.R. Fernandes, C.J.M. Verhoeven, M.M. Silva, Int. J. Circ. Theor. Appl. 38, 681 (2009)
  • 4. A.J. Scholten, L.F. Tiemeijer, R. van Langevelde, R.J. Havens, A.T.A. Zegers-van Duijnhoven, V.C. Venezia, Electron Dev., IEEE Trans. 50, 618 (2003)
  • 5. Jyh Chyurn Guo, Yi Min Lin, Comp. Aided Design of Int. Circ. Syst., IEEE Trans. 27, 1684 (2008)
Document Type
Publication order reference
YADDA identifier
bwmeta1.element.bwnjournal-article-appv119n244kz
Identifiers
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