Phase Noise Minimization in CMOS Voltage Controlled Oscillators

• Authors: J. Charlamov , R. Navickas , A. Baskys
• Languages of publication: EN

Abstracts

EN

Relaxation RC type voltage controlled oscillator is more desirable for many applications because of wide frequency generation range, small size on chip and linear voltage to frequency transfer characteristic. The limiting factor of such voltage controlled oscillator type is that it has higher phase noise in comparison with liquid crystal oscillators. We discuss how different device components, parameters and configuration influence phase noise, including transistor noise sources dependence on its geometrical parameters. The simulation results of the relaxation voltage controlled oscillator which was implemented in different 180 nm and 90 nm CMOS technologies are reported.

Keywords

EN

85.40.-e; 85.40.Qx; 07.50.Hp

Discipline

• 07.50.Hp: Electrical noise and shielding equipment
• 85.40.-e: Microelectronics: LSI, VLSI, ULSI; integrated circuit fabrication technology(see also 85.45.-w Vacuum microelectronics; 84.40.Lj Microwave integrated electronics; 42.82.-m Integrated optics; 85.25.Hv Superconducting logic elements and memory devices; microelectronic circuits)
• 85.40.Qx: Microcircuit quality, noise, performance, and failure analysis

• Journal: Acta Physica Polonica A
• Year: 2011
• Volume: 119
• Issue: 2
• Pages: 234-236

Dates

published

2011-02

Contributors

author

J. Charlamov

• Computer Engineering Department, Electronics Faculty, Vilnius Gediminas Technical University, Naugarduko Str. 41-447, LT-03227 Vilnius, Lithuania

author

R. Navickas

• Computer Engineering Department, Electronics Faculty, Vilnius Gediminas Technical University, Naugarduko Str. 41-447, LT-03227 Vilnius, Lithuania

author

A. Baskys

• Computer Engineering Department, Electronics Faculty, Vilnius Gediminas Technical University, Naugarduko Str. 41-447, LT-03227 Vilnius, Lithuania

References

• 1. J. Charlamov, R. Navickas, Solid State Phenom. Mechatronic Syst. and Mater. MSM 2010 164, 221 (2010)
• 2. T.H. Lee, R.W. Dutton, Solid State Circuits, IEEE J. 40, 630 (2005)
• 3. L.B. Oliveira, A. Allam, I.M. Filanovsky, , J.R. Fernandes, C.J.M. Verhoeven, M.M. Silva, Int. J. Circ. Theor. Appl. 38, 681 (2009)
• 4. A.J. Scholten, L.F. Tiemeijer, R. van Langevelde, R.J. Havens, A.T.A. Zegers-van Duijnhoven, V.C. Venezia, Electron Dev., IEEE Trans. 50, 618 (2003)
• 5. Jyh Chyurn Guo, Yi Min Lin, Comp. Aided Design of Int. Circ. Syst., IEEE Trans. 27, 1684 (2008)

Identifiers

DOI

10.12693/APhysPolA.119.234