Nanoscale Pattern Definition by Edge Oxidation of Silicon under the Si_{3}N_{4} mask - PaDEOx

• Authors: M. Zaborowski , P. Grabiec , R. Dobrowolski , A. Panas , K. Skwara , D. Szmigiel , M. Wzorek
• Languages of publication: EN

Abstracts

EN

Well-controlled method of Si nanopattern definition - pattern definition by edge oxidation have been presented. The technique is suitable for fabrication of narrow paths of width ranged from several tens of nm to several μm by means of photolithography equipment working with μm-scale design rules. Process details influencing a shape of the Si pattern have been discussed. SEM examinations have been presented.

Keywords

EN

68.65.-k; 74.78.-w; 81.16.Nd; 81.16.Rf; 81.65.Cf

Discipline

• 81.16.Rf: Micro- and nanoscale pattern formation
• 74.78.-w: Superconducting films and low-dimensional structures
• 68.65.-k: Low-dimensional, mesoscopic, nanoscale and other related systems: structure and nonelectronic properties(for structure of nanoscale materials, see 61.46.-w; for magnetic properties of interfaces, see 75.70.Cn; for superconducting properties, see 74.78.-w; for optical properties, see 78.67.-n; for transport properties, see 73.63.-b; for thermal properties of nanocrystals and nanotubes, see 65.80.-g; for mechanical properties of nanoscale systems, see 62.25.-g)
• 81.65.Cf: Surface cleaning, etching, patterning(see also 52.77.Bn Etching and cleaning in physics of plasmas)
• 81.16.Nd: Micro- and nanolithography

• Journal: Acta Physica Polonica A
• Year: 2009
• Volume: 116
• Issue: S
• Pages: S-139-S-141

Dates

published

2009-12

Contributors

author

M. Zaborowski

• Institute of Electron Technology, al. Lotników 32/46, 02-668 Warsaw, Poland

author

P. Grabiec

• Institute of Electron Technology, al. Lotników 32/46, 02-668 Warsaw, Poland

author

R. Dobrowolski

• Institute of Electron Technology, al. Lotników 32/46, 02-668 Warsaw, Poland

author

A. Panas

• Institute of Electron Technology, al. Lotników 32/46, 02-668 Warsaw, Poland

author

K. Skwara

• Institute of Electron Technology, al. Lotników 32/46, 02-668 Warsaw, Poland

author

D. Szmigiel

• Institute of Electron Technology, al. Lotników 32/46, 02-668 Warsaw, Poland

author

M. Wzorek

• Institute of Electron Technology, al. Lotników 32/46, 02-668 Warsaw, Poland

References

• 1. P.J. Tsang, S. Ogura, W.W. Walker, J.F. Shepard, D.L. Critchlow, IEEE Trans. Electron Dev. ED-29, 590 (1982)
• 2. Yang-Kyu Choi, Tsu-Jae King, Chenming Hu, IEEE Electron Dev. Lett. 23, 25 (2002)
• 3. M. Zaborowski, P. Grabiec, I.W. Rangelow, Microelectron. Eng. 73-74, 588 (2004)
• 4. M. Zaborowski, D. Szmigiel, T. Gotszalk, K. Ivanova, Y. Sarov, T. Ivanov, B.E. Volland, I.W. Rangelow, P. Grabiec, Microelectron. Eng. 83, 1555 (2006)
• 5. M. Zaborowski, P. Grabiec, Microelectron. Eng. 85, 1257 (2008)
• 6. D. Tomaszewski, A. Malinowski, M. Zaborowski, P. Sałek, L. Łukasiak, A. Jakubowski, Proc. 16th Int. Conf. Mixed Design of Integrated Circuits and Systems MIXDES 2009, DMCS Techn. Univ. of Łódź, Łódź 2009, p. 61

Identifiers

DOI

10.12693/APhysPolA.116.S-139